1. Field of the Invention
The present invention relates to a resistive memory structure and a method for fabricating the same, particularly to an ultra high density resistive memory structure having a quadruple memory density in an identical area.
2. Description of the Related Art
Advanced memories are emerging persistently, such as PCRAM (Phase Change Random Access Memory), MRAM (Magnetic Random Access Memory) and RRAM (Resistive Random Access Memory). Featuring high read/write speed, non-destructive reading, durability to extreme temperature, high integration with related circuits, RRAM is regarded as a memory potential to replace all the existing ones.
RRAM also has advantages of high density, low cost, low power consumption, superior data retention ability, and simple structure. Refer to FIG. 1 schematically showing an array structure of a conventional RRAM. The conventional RRAM comprises a plurality of first metal lines 10 functioning as bit lines and a plurality of second metal lines 12 functioning as word lines. The first metal lines 10 intersect the second metal lines 12. An insulating layer 14 is arranged between the first metal lines 10 and the second metal lines 12. Thus is formed a memory cell 16 in each intersection of the first metal lines 10 and the second metal lines 12.
The quantity of the memory cells 16 depends on the quantities of the first metal lines 10 and second metal lines 12. For example, there are 21 memory cells 16 if there are 7 first metal lines 10 in columns and 3 second metal lines 12 in rows. The principle of RRAM is that a voltage is applied to the first and second metal lines 10 and 12 to transform the insulating layer 14 from a high-resistance state to a low-resistance state or from a low-resistance state to a high-resistance state.
Because of market demand and technical evolution, the size of elements has reduced from microns to nanometers (1-100 nm). Suppose that the minimum feature size is 90 nm and denoted with F. In a conventional RRAM, the first metal line 10 has a width of 1 F, and the spacing between two adjacent first metal lines 10 is also 1 F. Thus, one first metal line 10 and the spacing thereof have a total width of 2 F. The second metal line 12 has a width of 1 F, and the spacing between two adjacent second metal lines 12 is also 1 F. Thus, one second metal line 12 and the spacing thereof also have a total width of 2 F. Therefore, the conventional RRAM has a minimum cell area of 4 F2. The scalability of such a memory structure has reached a physical limit. The density of a memory is unlikely to increase except the structures thereof are stacked up vertically. Nevertheless, the stacked memory structure is still hard to meet the demand for a high-capacity small-volume memory. Therefore, how to increase the memory density in a minimum memory area is a problem the manufacturers are eager to overcome.